From 7fe03d085c2ecaa324779093eceb1a12313ca25d Mon Sep 17 00:00:00 2001 From: yiancar Date: Fri, 28 Sep 2018 17:33:11 +0100 Subject: Update quantum matrix to support both AVR and Chibios ARM (#3968) * Update quantum matrix to support both AVR and Chibios ARM - Addition of STM32 pin definitions - Created abstruction layer defines to control GPIO (This is a bit pointless for Chibios as we are creating a PAL ontop of a PAL but it is necessary for uniformity with AVR) - Modified matrix.c to use the above functions * minor ifdef fix * Rename of functions and docs - Added documentation. - Renamed functions according to Jack's spec. * Massdrop fix * Update matrix.c * Update quantum.h * Update quantum.h * Update quantum.h * Update internals_gpio_control.md --- docs/internals_gpio_control.md | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 docs/internals_gpio_control.md (limited to 'docs/internals_gpio_control.md') diff --git a/docs/internals_gpio_control.md b/docs/internals_gpio_control.md new file mode 100644 index 0000000000..21643d30c9 --- /dev/null +++ b/docs/internals_gpio_control.md @@ -0,0 +1,23 @@ +# GPIO Control + +QMK has a GPIO control abstraction layer which is micro-controller agnostic. This is done to allow easy access to pin control across different platforms. + +## Functions + +The following functions can provide basic control of GPIOs and are found in `quantum/quantum.h`. + +|Function |Description | +|----------------------|------------------------------------------------------------------| +|`setPinInput(pin)` |Set pin as input with high impedance (High-Z) | +|`setPinInputHigh(pin)`|Set pin as input with build in pull-up | +|`setPinInputLow(pin)` |Set pin as input with build in pull-down (Supported only on STM32)| +|`setPinOutput(pin)` |Set pin as output | +|`writePinHige(pin)` |Set pin level as high, assuming it is an output | +|`writePinLow(pin)` |Set pin level as low, assuming it is an output | +|`writePin(pin, level)`|Set pin level, assuming it is an output | +|`readPin(pin)` |Returns the level of the pin | + +## Advance settings + +Each micro-controller can have multiple advance settings regarding its GPIO. This abstraction layer does not limit the use of architecture specific functions. Advance users should consult the datasheet of there desired device and include any needed libraries. For AVR the standard avr/io.h library is used and for STM32 the Chibios [PAL library](http://chibios.sourceforge.net/docs3/hal/group___p_a_l.html) is used. + -- cgit v1.2.3 From 15f6278aa623ceda4c220daee1cbedb9e38e6a97 Mon Sep 17 00:00:00 2001 From: Jack Humbert Date: Fri, 2 Nov 2018 12:31:40 -0400 Subject: Add support for Atmega32A to pin declarations and universal matrix (#4015) * add computed pins from mcu type * update for atmega32a * doc typo * add atmega16 chips, link to references * remove avr include from config * exclude assembler in config.h includes * consolodate options, add 646 * fix typo in pindef --- docs/internals_gpio_control.md | 2 +- quantum/config_common.h | 156 +++++++++++++++++++----------- quantum/quantum.h | 20 ++-- tmk_core/protocol/vusb/usbdrv/usbdrvasm.S | 8 +- 4 files changed, 118 insertions(+), 68 deletions(-) (limited to 'docs/internals_gpio_control.md') diff --git a/docs/internals_gpio_control.md b/docs/internals_gpio_control.md index 21643d30c9..083e696648 100644 --- a/docs/internals_gpio_control.md +++ b/docs/internals_gpio_control.md @@ -12,7 +12,7 @@ The following functions can provide basic control of GPIOs and are found in `qua |`setPinInputHigh(pin)`|Set pin as input with build in pull-up | |`setPinInputLow(pin)` |Set pin as input with build in pull-down (Supported only on STM32)| |`setPinOutput(pin)` |Set pin as output | -|`writePinHige(pin)` |Set pin level as high, assuming it is an output | +|`writePinHigh(pin)` |Set pin level as high, assuming it is an output | |`writePinLow(pin)` |Set pin level as low, assuming it is an output | |`writePin(pin, level)`|Set pin level, assuming it is an output | |`readPin(pin)` |Returns the level of the pin | diff --git a/quantum/config_common.h b/quantum/config_common.h index 288617255f..cbff372eaf 100644 --- a/quantum/config_common.h +++ b/quantum/config_common.h @@ -1,4 +1,4 @@ -/* Copyright 2015-2017 Jack Humbert +/* Copyright 2015-2018 Jack Humbert * * This program is free software: you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -14,8 +14,7 @@ * along with this program. If not, see . */ -#ifndef CONFIG_DEFINITIONS_H -#define CONFIG_DEFINITIONS_H +#pragma once /* diode directions */ #define COL2ROW 0 @@ -23,57 +22,108 @@ #define CUSTOM_MATRIX 2 /* Disables built-in matrix scanning code */ #ifdef __AVR__ + #ifndef __ASSEMBLER__ + #include + #endif + #define PORT_SHIFTER 4 // this may be 4 for all AVR chips + + // If you want to add more to this list, reference the PINx definitions in these header + // files: https://github.com/vancegroup-mirrors/avr-libc/tree/master/avr-libc/include/avr + + #if defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega16U4__) + #define ADDRESS_BASE 0x00 + #define PINB_ADDRESS 0x3 + #define PINC_ADDRESS 0x6 + #define PIND_ADDRESS 0x9 + #define PINE_ADDRESS 0xC + #define PINF_ADDRESS 0xF + #elif defined(__AVR_ATmega32U2__) || defined(__AVR_ATmega16U2__) + #define ADDRESS_BASE 0x00 + #define PINB_ADDRESS 0x3 + #define PINC_ADDRESS 0x6 + #define PIND_ADDRESS 0x9 + #elif defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB646__) + #define ADDRESS_BASE 0x00 + #define PINA_ADDRESS 0x0 + #define PINB_ADDRESS 0x3 + #define PINC_ADDRESS 0x6 + #define PIND_ADDRESS 0x9 + #define PINE_ADDRESS 0xC + #define PINF_ADDRESS 0xF + #elif defined(__AVR_ATmega32A__) + #define ADDRESS_BASE 0x10 + #define PIND_ADDRESS 0x0 + #define PINC_ADDRESS 0x3 + #define PINB_ADDRESS 0x6 + #define PINA_ADDRESS 0x9 + #else + #error "Pins are not defined" + #endif + /* I/O pins */ - #ifndef F0 - #define B0 0x30 - #define B1 0x31 - #define B2 0x32 - #define B3 0x33 - #define B4 0x34 - #define B5 0x35 - #define B6 0x36 - #define B7 0x37 - #define C0 0x60 - #define C1 0x61 - #define C2 0x62 - #define C3 0x63 - #define C4 0x64 - #define C5 0x65 - #define C6 0x66 - #define C7 0x67 - #define D0 0x90 - #define D1 0x91 - #define D2 0x92 - #define D3 0x93 - #define D4 0x94 - #define D5 0x95 - #define D6 0x96 - #define D7 0x97 - #define E0 0xC0 - #define E1 0xC1 - #define E2 0xC2 - #define E3 0xC3 - #define E4 0xC4 - #define E5 0xC5 - #define E6 0xC6 - #define E7 0xC7 - #define F0 0xF0 - #define F1 0xF1 - #define F2 0xF2 - #define F3 0xF3 - #define F4 0xF4 - #define F5 0xF5 - #define F6 0xF6 - #define F7 0xF7 - #define A0 0x00 - #define A1 0x01 - #define A2 0x02 - #define A3 0x03 - #define A4 0x04 - #define A5 0x05 - #define A6 0x06 - #define A7 0x07 + #define PINDEF(port, pin) ((PIN##port##_ADDRESS << PORT_SHIFTER) | pin) + + #ifdef PORTA + #define A0 PINDEF(A, 0) + #define A1 PINDEF(A, 1) + #define A2 PINDEF(A, 2) + #define A3 PINDEF(A, 3) + #define A4 PINDEF(A, 4) + #define A5 PINDEF(A, 5) + #define A6 PINDEF(A, 6) + #define A7 PINDEF(A, 7) + #endif + #ifdef PORTB + #define B0 PINDEF(B, 0) + #define B1 PINDEF(B, 1) + #define B2 PINDEF(B, 2) + #define B3 PINDEF(B, 3) + #define B4 PINDEF(B, 4) + #define B5 PINDEF(B, 5) + #define B6 PINDEF(B, 6) + #define B7 PINDEF(B, 7) #endif + #ifdef PORTC + #define C0 PINDEF(C, 0) + #define C1 PINDEF(C, 1) + #define C2 PINDEF(C, 2) + #define C3 PINDEF(C, 3) + #define C4 PINDEF(C, 4) + #define C5 PINDEF(C, 5) + #define C6 PINDEF(C, 6) + #define C7 PINDEF(C, 7) + #endif + #ifdef PORTD + #define D0 PINDEF(D, 0) + #define D1 PINDEF(D, 1) + #define D2 PINDEF(D, 2) + #define D3 PINDEF(D, 3) + #define D4 PINDEF(D, 4) + #define D5 PINDEF(D, 5) + #define D6 PINDEF(D, 6) + #define D7 PINDEF(D, 7) + #endif + #ifdef PORTE + #define E0 PINDEF(E, 0) + #define E1 PINDEF(E, 1) + #define E2 PINDEF(E, 2) + #define E3 PINDEF(E, 3) + #define E4 PINDEF(E, 4) + #define E5 PINDEF(E, 5) + #define E6 PINDEF(E, 6) + #define E7 PINDEF(E, 7) + #endif + #ifdef PORTF + #define F0 PINDEF(F, 0) + #define F1 PINDEF(F, 1) + #define F2 PINDEF(F, 2) + #define F3 PINDEF(F, 3) + #define F4 PINDEF(F, 4) + #define F5 PINDEF(F, 5) + #define F6 PINDEF(F, 6) + #define F7 PINDEF(F, 7) + #endif + #elif defined(PROTOCOL_CHIBIOS) #define A0 PAL_LINE(GPIOA, 0) #define A1 PAL_LINE(GPIOA, 1) @@ -200,5 +250,3 @@ #define API_SYSEX_MAX_SIZE 32 #include "song_list.h" - -#endif diff --git a/quantum/quantum.h b/quantum/quantum.h index 1d3ee033fd..fe670c8eb4 100644 --- a/quantum/quantum.h +++ b/quantum/quantum.h @@ -140,26 +140,28 @@ extern uint32_t default_layer_state; //Function substitutions to ease GPIO manipulation #ifdef __AVR__ + #define PIN_ADDRESS(p, offset) _SFR_IO8(ADDRESS_BASE + (p >> PORT_SHIFTER) + offset) + #define pin_t uint8_t - #define setPinInput(pin) _SFR_IO8((pin >> 4) + 1) &= ~ _BV(pin & 0xF) + #define setPinInput(pin) PIN_ADDRESS(pin, 1) &= ~ _BV(pin & 0xF) #define setPinInputHigh(pin) ({\ - _SFR_IO8((pin >> 4) + 1) &= ~ _BV(pin & 0xF);\ - _SFR_IO8((pin >> 4) + 2) |= _BV(pin & 0xF);\ + PIN_ADDRESS(pin, 1) &= ~ _BV(pin & 0xF);\ + PIN_ADDRESS(pin, 2) |= _BV(pin & 0xF);\ }) #define setPinInputLow(pin) _Static_assert(0, "AVR Processors cannot impliment an input as pull low") - #define setPinOutput(pin) _SFR_IO8((pin >> 4) + 1) |= _BV(pin & 0xF) + #define setPinOutput(pin) PIN_ADDRESS(pin, 1) |= _BV(pin & 0xF) - #define writePinHigh(pin) _SFR_IO8((pin >> 4) + 2) |= _BV(pin & 0xF) - #define writePinLow(pin) _SFR_IO8((pin >> 4) + 2) &= ~_BV(pin & 0xF) + #define writePinHigh(pin) PIN_ADDRESS(pin, 2) |= _BV(pin & 0xF) + #define writePinLow(pin) PIN_ADDRESS(pin, 2) &= ~_BV(pin & 0xF) static inline void writePin(pin_t pin, uint8_t level){ if (level){ - _SFR_IO8((pin >> 4) + 2) |= _BV(pin & 0xF); + PIN_ADDRESS(pin, 2) |= _BV(pin & 0xF); } else { - _SFR_IO8((pin >> 4) + 2) &= ~_BV(pin & 0xF); + PIN_ADDRESS(pin, 2) &= ~_BV(pin & 0xF); } } - #define readPin(pin) (_SFR_IO8(pin >> 4) & _BV(pin & 0xF)) + #define readPin(pin) (PIN_ADDRESS(pin, 0) & _BV(pin & 0xF)) #elif defined(PROTOCOL_CHIBIOS) #define pin_t ioline_t #define setPinInput(pin) palSetLineMode(pin, PAL_MODE_INPUT) diff --git a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S b/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S index 45fcf18315..2e8097da9c 100644 --- a/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S +++ b/tmk_core/protocol/vusb/usbdrv/usbdrvasm.S @@ -118,7 +118,7 @@ RTMODEL "__rt_version", "3" # define polyH r21 # define scratch r23 -#else /* __IAR_SYSTEMS_ASM__ */ +#else /* __IAR_SYSTEMS_ASM__ */ /* Register assignments for usbCrc16 on gcc */ /* Calling conventions on gcc: * First parameter passed in r24/r25, second in r22/23 and so on. @@ -151,7 +151,7 @@ RTMODEL "__rt_version", "3" ; unsigned table(unsigned char x) ; { ; unsigned value; -; +; ; value = (unsigned)x << 6; ; value ^= (unsigned)x << 7; ; if(parity(x)) @@ -161,7 +161,7 @@ RTMODEL "__rt_version", "3" ; unsigned usbCrc16(unsigned char *argPtr, unsigned char argLen) ; { ; unsigned crc = 0xffff; -; +; ; while(argLen--) ; crc = table(lo8(crc) ^ *argPtr++) ^ hi8(crc); ; return ~crc; @@ -299,7 +299,7 @@ usbCrc16Append: # define cnt16H r31 # define cntH r18 -#else /* __IAR_SYSTEMS_ASM__ */ +#else /* __IAR_SYSTEMS_ASM__ */ /* Register assignments for usbMeasureFrameLength on gcc */ /* Calling conventions on gcc: * First parameter passed in r24/r25, second in r22/23 and so on. -- cgit v1.2.3